Senior Design Team sample • Sample SD Site

Project Overview

The goal of this project is to create a ASIC using the Skywater 130nm process that contains a ReRAM crossbar that is able to do multiply and accumulate operations. The company eFabless has multi project wafer(MPW) submissions, which you can create to have your chip fabricated for free. We will create a submission and hopefully be selected for fabrication. The ReRAM crossbar is an example of process in memory (PIM) computing, which allows for more efficient computation by avoiding the use of dedicated computation hardware. Through this process we aim to document the open source analog design process to assist future students in creating open source analog designs, along with assisting Professor Wang's research by fabricating a ReRAM crossbar in silicon.

Team Members

Aiden Petersen

Digital Designer

A computer engineering major primarily interested in computer architecture.

Joshua Thater

Mixed Signal Designer

An electrical engineering student focusing in analog and digital VLSI design

Matthew Ottersen

Analog Designer

Electrical Engineer

Regassa Dukele

Analog Designer

Electrical engineering student focused on VLSI design





Weekly Reports Spring 2023

Report 1
Report 2
Report 3
Report 4
Report 5
Report 6
Report 7
Report 8
Report 9
Report 10




Bi-Weekly Reports Fall 2023

Report 1
Report 2
Report 3
Report 4
Report 5
Report 6




Design Documents Spring 2023

Final Design
Final Presentation




Design Documents Fall 2023

IRP Presentation
Design Poster
Final Design Document
Bring-Up Plan
Analog Design Flow Tutorial
Digital Model Guide
Pre-check Guide




Lightning Talks

Design Talk
Project Plan
Testing Talk
Requirements, Contraints, and Standards